From 1c07b0135a715021142c549eae6ad5c52acd9eb6 Mon Sep 17 00:00:00 2001 From: Pu Wen Date: Thu, 4 Apr 2019 21:45:56 +0800 Subject: [PATCH] x86/cpu/mtrr: Add Hygon Dhyana support to get TOP_MEM2 The Hygon Dhyana CPU supports the MSR way to get TOP_MEM2. So add Hygon Dhyana support to print the value of TOP_MEM2. Signed-off-by: Pu Wen Acked-by: Jan Beulich --- xen/arch/x86/cpu/mtrr/generic.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/cpu/mtrr/generic.c b/xen/arch/x86/cpu/mtrr/generic.c index 8f9cf1b1d7..94ee7d61ad 100644 --- a/xen/arch/x86/cpu/mtrr/generic.c +++ b/xen/arch/x86/cpu/mtrr/generic.c @@ -217,8 +217,9 @@ static void __init print_mtrr_state(const char *level) printk("%s %u disabled\n", level, i); } - if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD - && boot_cpu_data.x86 >= 0xf) { + if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD && + boot_cpu_data.x86 >= 0xf) || + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) { uint64_t syscfg, tom2; rdmsrl(MSR_K8_SYSCFG, syscfg); -- 2.30.2